
About UALink
Our Mission
We are a dynamic group of industry leaders united in our goal to foster innovation and establish an open, interoperable standard for high-performance computing connections in scale-up AI environments.
​Through the collaborative efforts of a diverse group of industry experts focused on efficiency and scalability, UALink empowers AI-driven applications. We drive the adoption of a connection between accelerators and related devices, enabling seamless interoperability, communication, and high-performance computing - setting new standards for AI, empowering the development of next-generation applications, and driving transformative breakthroughs in the AI era.
Our organization and its members aim to ensure accessibility and integration across an array of platforms and devices.
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Our Vision
We envision a world where AI's potential is unleashed through connecting devices via an optimized, high-performance interconnect. We strive for an interconnected ecosystem of compute engines, fabrics, and AI applications operating with unprecedented speed and efficiency, driven by a collaborative open standard. ​
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Industry Demand
As Artificial Intelligence (AI) models continue to grow, data centers are requiring increasing amounts of available compute and memory to efficiently execute training and inference.
The UALink Consortium was formed to develop technical specifications that facilitate direct load, store, and atomic operations between AI Accelerators (i.e. GPUs). We are currently developing a new industry standard, working to establish an optimized scale-up ecosystem, and investing in an open solution that enables advanced models across multiple AI accelerators.
The UALink 1.0 Specification - coming soon! - taps into the expertise of our Promoter Members who are actively developing and deploying a broad range of accelerators. The technology centers around low latency/high bandwidth fabric for hundreds of accelerators in a pod as well as simple load and store semantics with software coherency. The initial specification will enable the connection of up to 1K accelerators within an AI pod and is based on the IEEE P802.3dj PHY Layer.
​The Consortium officially incorporated as an organization in 2024, and its first specification will be made available to the public in 2025.
Questions? Contact admin@ualinkconsortium.org.
Interested in joining? Learn more.
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